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ltc6255/ltc6256/ltc6257 625567fb 1 applic a tions n micropower active filters n portable instrumentation n battery or solar powered systems n automotive electronics n gain bandwidth product: 6.5mhz n C3db bandwidth (a v = +1): 4.5mhz n low quiescent current: 65a n stable for capacitive load up to 100nf n offset voltage: 350v maximum n rail-to-rail input and output n supply voltage range: 1.8v to 5.25v n input bias current: 50na maximum n cmrr/psrr: 100db/100db n shutdown current: 7a maximum n operating temperature range: C40c to 125c n single in 6-lead tsot-23 package n dual in 8-lead ms8, ms10, ts0t-23, 2mm 2mm thin dfn packages n quad in ms16 package t ypic a l applic a tion description 6.5mhz, 65a power efficient rail-to-rail i/o op amps the ltc ? 6255/ltc6256/ltc6257 are single/dual/quad operational amplifiers with low noise, low power, low supply voltage, and rail-to-rail inputs and outputs. they are unity gain stable with capacitive load up to 100nf. they feature 6.5mhz gain-bandwidth product, 1.8v/s slew rate while consuming only 65a of supply current per amplifier operating on supply voltages ranging from 1.8v to 5.25v. the combination of low supply current, low supply voltage, high gain bandwidth product and low noise makes the ltc6255 family unique among rail-to-rail input/output op amps with similar supply current. these operational amplifiers are ideal for low power and low noise applications. for applications that require power-down, the ltc6255 and ltc6256 in s6 and ms10 packages offer shutdown which reduces the current consumption to 7a maximum. the ltc6255 family can be used as plug-in replacements for many commercially available op amps to reduce power and improve input/output range and performance. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and over-the-top is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. low power, low distortion adc driver fe a tures ltc6255 driving ltc2361 adc v in = ?1dbfs, 5khz f s = 125ksps snr = 72.5db sfdr = 89db t acq = 5s t conv = 3s magnitude (db) frequency (khz) 625567 ta01b 0 10 20 30 40 50 60 0 ?30 ?50 ?10 ?110 ?20 ?40 ?60 ?70 ?80 ?90 ?100 + ? ltc6255 v in 5mv to 2v 3.3v 3.3v 10k 1% 22pf 6.34k, 1% 324 1% 470pf npo gnd cs sdo sck ov dd v dd a in i supply = 540a total at 125ksps v ref 625567 ta01a ltc2361
ltc6255/ltc6256/ltc6257 2 625567fb absolute m a xi m u m ra tings supply voltage: v + C v C ........................................... 5. 5v input voltage ................................... v C C 0.2 to v + + 0.2 input current: +in, Cin, shdn (note 2) ............... 1 0ma output current: out ........................................... 20ma output short-circuit duration (note 3) ............ in definite operating temperature range (note 4) ltc6255c/ltc6256c/ltc6257c ......... C 40c to 85c ltc6255i/ltc6256i/ltc6257i ............ C 40c to 85c ltc6255h/ltc6256h/ltc6257h ...... C 40c to 125c (note 1) top view kc package 8-lead (2mm 2mm) plastic utdfn 5 6 7 8 9 v ? 4 3 2 1outa ?ina +ina v ? v + outb ?inb +inb + ? + ? t jmax = 125c, q ja = 89c/w (note 6) exposed pad (pin 9) is v C , must be soldered to pcb 1 2 3 6 5 4 top view s6 package 6-lead plastic tsot-23 v + shdn ?in out v ? +in + ? t jmax = 150c, q ja = 192c/w (note 6) 1 2 3 4 8 7 6 5 top view ts8 package 8-lead plastic tsot-23 v + outb ?inb +inb outa ?ina +ina v ? + ? + ? t jmax = 150c, q ja = 195c/w (note 6) 1 2 3 4 outa ?ina +ina v ? 8 7 6 5 v + outb ?inb +inb top view ms8 package 8-lead plastic msop + ? + ? t jmax = 150c, q ja = 163c/w (note 6) 1 2 3 4 5 outa ?ina +ina v ? shdna 10 9 8 7 6 v + outb ?inb +inb shdnb top view ms package 10-lead plastic msop + ? + ? t jmax = 150c, q ja = 160c/w (note 6) 1 2 3 4 5 6 7 8 outa ?ina +ina v + +inb ?inb outb nc 16 15 14 13 12 11 10 9 outd ?ind +ind v ? +inc ?inc outc nc top view ms package 16-lead plastic msop + ? + ? + ? + ? t jmax = 150c, q ja = 125c/w (note 6) p in c on f igur a tion specified temperature range (note 5) ltc6255c/ltc6256c/ltc6257c ............. 0 c to 70c ltc6255i/ltc6256i/ltc6257i ............ C 40c to 85c ltc6255h/ltc6256h/ltc6257h ...... C 40c to 125c maximum junction temperature .......................... 15 0c storage temperature range .................. C 65c to 150c lead temperature (soldering, 10 sec) s6, ts8, ms8, ms only ......................................... 30 0c
ltc6255/ltc6256/ltc6257 625567fb 3 o r d er i n f or ma tion 5v e lectric a l c h a r a cteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v supply = 5v, v cm = v out = v supply /2, c l = 10pf, v shdn is unconnected. symbol parameter conditions min typ max units v os input offset voltage v cm = v C + 0.3v (pnp region) l C350 C700 100 350 700 v v v cm = v + C 0.3v (npn region) l C350 C700 100 350 700 v v v os tc input offset voltage drift v cm = v C + 0.3v, v + C 0.3v l 1.5 v/c i b input bias current (note 7) v cm = v C + 0.3v l C50 C75 C5 50 75 na na v cm = v + C 0.3v l C50 C75 5 50 75 na na i os input offset current v cm = v C + 0.3v l C20 C35 2 20 35 na na v cm = v + C 0.3v l C20 C35 2 20 35 na na e n input voltage noise density f = 1khz 20 nv/ hz input noise voltage f = 0.1hz to 10hz 2.5 v p-p i n input current noise density f = 1khz, v cm = 0v to 4v (pnp input) f = 1khz, v cm = 4v to 5v (npn input) 380 850 f a /hz f a /hz r in input resistance differential common mode 1 10 m m lead free finish tape and reel (mini) tape and reel part marking* package description temperature range ltc6255cs6#trmpbf ltc6255cs6#trpbf ltfft 6-lead plastic tsot-23 0c to 70c ltc6255is6#trmpbf ltc6255is6#trpbf ltfft 6-lead plastic tsot-23 C40c to 85c ltc6255hs6#trmpbf ltc6255hs6#trpbf ltfft 6-lead plastic tsot-23 C40c to 125c ltc6256cts8#trmpbf ltc6256cts8#trpbf ltffw 8-lead plastic tsot-23 0c to 70c ltc6256its8#trmpbf ltc6256its8#trpbf ltffw 8-lead plastic tsot-23 C40c to 85c ltc6256hts8#trmpbf ltc6256hts8#trpbf ltffw 8-lead plastic tsot-23 C40c to 125c ltc6256ckc#trmpbf ltc6256ckc#trpbf dxyt 8-lead (2mm 2mm) plastic utdfn 0c to 70c ltc6256ikc#trmpbf ltc6256ikc#trpbf dxyt 8-lead (2mm 2mm) plastic utdfn C40c to 85c lead free finish tape and reel part marking* package description temperature range ltc6256cms8#pbf ltc6256cms8#trpbf ltdxw 8-lead plastic msop 0c to 70c ltc6256ims8#pbf ltc6256ims8#trpbf ltdxw 8-lead plastic msop C40c to 85c ltc6256cms#pbf ltc6256cms#trpbf ltdxx 10-lead plastic msop 0c to 70c ltc6256ims#pbf ltc6256ims#trpbf ltdxx 10-lead plastic msop C40c to 85c ltc6257cms#pbf ltc6257cms#trpbf 6257 16-lead plastic msop 0c to 70c ltc6257ims#pbf ltc6257ims#trpbf 6257 16-lead plastic msop C40c to 85c ltc6257hms#pbf ltc6257hms#trpbf 6257 16-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *temperature grades are identified by a label on the shipping container. consult ltc marketing for information on lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ltc6255/ltc6256/ltc6257 4 625567fb 5v e lectric a l c h a r a cteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v supply = 5v, v cm = v out = v supply /2, c l = 10pf, v shdn is unconnected. symbol parameter conditions min typ max units c in input capacitance differential common mode 0.4 0.3 pf pf cmrr common mode rejection ratio v cm = 0.3v to 3.5v l 75 71 100 db db ivr input voltage range l C0.1 5.1 v psrr power supply rejection ratio v cm = 0.4v, v s ranges from 1.8v to 5v l 82 78 100 db db a v large signal gain v out = 0.5v to 4.5v, r load = 100k l 50 28 200 v/mv v/mv v out = 0.5v to 4.5v, r load = 10k l 25 8 50 v/mv v/mv v ol output swing low (input overdrive 30mv). measured from v C no load l 6 25 35 mv mv i sink = 100a l 10 30 40 mv mv i sink = 1ma l 30 75 95 mv mv v oh output swing high (input overdrive 30mv). measured from v + no load l 24 55 60 mv mv i source = 100a l 30 80 90 mv mv i source = 1ma l 75 150 170 mv mv i sc output short-circuit current l 17 8 35 ma ma i s supply current per amplifier l 57 42 65 85 100 a a supply current in shutdown l 6 7 12 a a i shdn shutdown pin current v shdn = 0.6v v shdn = 1.5v l l C1400 C900 C1000 C500 na na v il shdn input low voltage disable l 0.6 v v ih shdn input high voltage enable l 1.5 v t on turn-on time shdn toggle from 0v to 5v 50 s t off turn-off time shdn toggle from 5v to 0v 20 s bw C3db closed loop bandwidth a v = 1 4.5 mhz gbw gain-bandwidth product f = 200khz l 2.5 2 6.5 mhz mhz t s settling time, 0.5v to 4.5v, unity gain 0.1% 0.01% 4 6 s s sr slew rate a v = C1, v out = 0.5v to 4.5v, c load = 10pf, r f = r g = 10k l 1.0 0.75 1.8 v/s v/s fpbw full power bandwidth (note 8) 4v p-p 140 khz thd+n total harmonic distortion and noise f = 500hz, a v = 2, r l = 4k, v outp-p = 1v v in = 2.25v to 2.75v 0.0022 93 % db i leak output leakage current in shutdown v shdn = 0v, v out = 0v v shdn = 0v, v out = 5v l l C400 C400 400 400 na na
ltc6255/ltc6256/ltc6257 625567fb 5 1.8v e lectric a l c h a r a cteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v supply = 1.8v, v cm = v out = 0.4v, c l = 10pf, v shdn is unconnected. symbol parameter conditions min typ max units v os input offset voltage v cm = v C + 0.3v l C350 C700 100 350 700 v v v cm = v + C 0.3v l C350 C700 100 350 700 v v v os tc input offset voltage drift v cm = v C + 0.3v, v + C 0.3v l 1.5 v/c i b input bias current (note 7) v cm = v C + 0.3v l C50 C75 C8 50 75 na na v cm = v + C 0.3v l C50 C75 5 50 75 na na i os input offset current v cm = v C + 0.3v l C20 C35 2 20 35 na na v cm = v + C 0.3v l C20 C35 2 20 35 na na e n input voltage noise density f = 1khz, v cm = 0.4v 21 nv/ hz input noise voltage f = 0.1hz to 10hz 2.5 v p-p i n input current noise density f = 1khz, v cm = 0v to 0.8v (pnp input) f = 1khz, v cm = 1v to 1.8v (npn input) 580 870 f a /hz f a /hz r in input resistance differential common mode 1 10 m m c in input capacitance differential common mode 0.4 0.3 pf pf cmrr common mode rejection ratio v cm = 0.2v to 1.6v l 74 67 90 db db ivr input voltage range l C0.1 1.9 v psrr power supply rejection ratio v cm = 0.4v, v s ranges from 1.8v to 5v l 82 78 100 db db a v large signal gain v out = 0.5v to 1.3v, r load = 100k l 30 17 110 v/mv v/mv v out = 0.5v to 1.3v, r load = 10k l 15 5 50 v/mv v/mv v ol output swing low (input overdrive 30mv), measured from v C no load l 6 35 40 mv mv i sink = 100a l 10 40 45 mv mv i sink = 1ma l 30 75 90 mv mv
ltc6255/ltc6256/ltc6257 6 625567fb note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the inputs are protected by back-to-back diodes as well as esd protection diodes to each power supply. if the differential input voltage exceeds 3.6v or the input extends more than 500mv beyond the power supply, the input current should be limited to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. note 4: the ltc6255c/ltc6256c/ltc6257c and ltc6255i/ltc6256i/ ltc6257i are guaranteed functional over the temperature range of C40c to 85c. the ltc6255h/ltc6256h/ltc6257h are guaranteed functional over the temperature range of C40c to 125c. 1.8v e lectric a l c h a r a cteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v supply = 1.8v, v cm = v out = 0.4v, c l = 10pf, v shdn is unconnected. symbol parameter conditions min typ max units v oh output swing high (input overdrive 30mv), measured from v + no load l 24 55 60 mv mv i source = 100a l 30 65 75 mv mv i source = 1ma l 75 135 150 mv mv i sc output short-circuit current l 12 3 17 ma ma i s supply current per amplifier l 53 35 60 68 83 a a supply current in shutdown l 1.4 2.0 3.0 a a i shdn shutdown pin current v shdn = 0.5v v shdn = 1.3v l l C480 C160 C350 C40 na na v il shdn input low voltage disable l 0.5 v v ih shdn input high voltage enable l 1.3 v t on turn-on time shdn toggle from 0v to 1.8v 150 s t off turn-off time shdn toggle from 1.8v to 0v 50 s bw C3db closed loop bandwidth a v = 1 4 mhz gbw gain-bandwidth product f = 200khz l 2.4 1.8 6 mhz mhz t s settling time, 0.3v to 1.5v, unity gain 0.1% 0.01% 4 6 s s sr slew rate a v = C1, v out = 0.3v to 1.5v, c load = 10pf l 0.9 0.75 1.5 v/s v/s fpbw full power bandwidth (note 8) 1.2v p-p 400 khz thd+n total harmonic distortion and noise f = 500hz, a v = 2, r l = 4k, v outp-p = 1v v in = 0.25v to 0.75v 0.006 84 % db note 5: the ltc6255c/ltc6256c/ltc6257c are guaranteed to meet the specified performance from 0c to 70c. the ltc6255c/ltc6256c/ ltc6257c are designed, characterized and expected to meet specified performance from C40c to 85c but are not tested or qa sampled at these temperatures. the ltc6255i/ltc6256i/ltc6257i are guaranteed to meet specified performance from C40c to 85c. the ltc6255h/ ltc6256h/ltc6257h are guaranteed to meet specified performance from C40c to 125c. note 6: thermal resistance varies with the amount of pc board metal connected to the package. the specified values are for short traces connected to the leads. note 7: the input bias current is the average of the currents through the positive and negative input pins. note 8: full power bandwidth is calculated from the slew rate fpbw = sr/ ? v p-p .
ltc6255/ltc6256/ltc6257 625567fb 7 distribution (v/c) ?3.5 v os (v) 20 8 18 16 4 2 6 10 12 14 0 0.5 ?2.5 625567 g04 1.5 0?0.5 ?1.5 primary secondary extra bar h-grade industrial commercial v s = 2.5v v cm = 0v t ypic a l p er f or ma nce c h a r a cteristics v os tc (C40c to 125c) v os vs supply voltage (25c) v os vs common mode voltage v os vs i out input bias current vs common mode voltage input bias current vs common mode voltage input v os histogram input v os histogram v os vs temperature v cm (v) 0 v os (v) 500 ?100 400 200 0 ?300 300 100 ?400 ?200 ?500 3 625567 g06 54 21 v s = 5v, 0v supply voltage (v) 1.8 v os (v) 500 ?100 400 200 0 ?300 300 100 ?400 ?200 ?500 625567 g05 2.3 2.8 3.3 3.8 4.3 4.8 v cm = 0.4v i out (ma) ?5 0 v os (mv) 25 ?5 20 10 0 ?15 15 5 ?20 ?10 ?25 3 ?3 625567 g07 54 ?4 2 ?2 1?1 ?55c, 25c 125c v s = 2.5v v cm = 0v v cm (v) 0 input bias current (na) 100 ?20 80 40 0 ?60 60 20 ?80 ?40 ?100 3 625567 g08 54 21 v s = 5v, 0v +in ?in v cm (v) 0 input bias current (na) 100 ?20 80 40 0 ?60 60 20 ?80 ?40 ?100 625567 g09 1.81.61.41.21.0 0.2 0.4 0.6 0.8 v s = 1.8v, 0v +in ?in v os (v) ?1000 number of units 250 200 150 100 50 0 0 625567 g01 1000 500 ?500 v s = 2.5v v cm = 0v v os (v) ?1000 number of units 140 120 100 80 60 20 40 0 625567 g02 1000 600 200 ?600 ?200 v s = 2.5v v cm = 2.2v temperature (c) ?40 35 v os (v) 300 ?200 250 200 150 100 50 0 ?300 ?350 ?250 ?150 ?100 ?50 ?400 80 ?10 625567 g03 12595 110 ?25 65 5 5020 v s = 2.5v v cm = 0v
ltc6255/ltc6256/ltc6257 8 625567fb t ypic a l p er f or ma nce c h a r a cteristics supply current vs temperature output saturation voltage vs load current (output high) output saturation voltage vs load current (output low) output short-circuit current vs supply voltage (sourcing) output short-circuit current vs supply voltage (sinking) 0.1hz to 10hz output voltage noise input bias current vs supply voltage input bias current vs temperature supply voltage (v) 1.8 625567 g10 2.8 3.8 4.8 v cm = 0.4v input bias current (na) 25 ?5 20 10 0 ?15 15 5 ?20 ?10 ?25 +in ?in temperature (c) ?40 625567 g11 10 60 110 v s = 2.5v v cm = ?2v v cm = 2v input bias current (na) 50 ?10 40 20 0 ?30 30 10 ?40 ?20 ?50 temperature (c) ?40 supply current (a) 100 40 20 80 60 0 625567 g13 ?15 10 35 60 85 110 v cm = 0.4v v s = 5v, 0v v s = 1.8v, 0v load current (ma) 0 saturation voltage from top rail (v) 0 ?0.15 ?0.10 ?0.05 ?0.25 ?0.20 ?0.30 ?0.35 3 625567 g14 54 21 125c, v s = 5v 85c, v s = 5v 25c, v s = 5v ?40c, v s = 5v 125c, v s = 1.8v 85c, v s = 1.8v 25c, v s = 1.8v ?40c, v s = 1.8v load current (ma) 0 saturation voltage from bottom rail (v) 0.5 0.4 0.2 0.3 0.1 0 3 625567 g15 54 21 125c, v s = 1.8v 125c, v s = 5v 85c, v s = 1.8v 85c, v s = 5v 25c, v s = 1.8v 25c, v s = 5v ?40c, v s = 1.8v ?40c, v s = 5v supply voltage (v) 1.8 maximum sourcing current (ma) 100 40 20 80 60 0 50 30 90 70 10 625567 g16 2.3 2.8 3.3 3.8 4.3 4.8 v cm = 0.4v 25c ?40c 125c supply voltage (v) 1.8 maximum sinking current (ma) 100 40 20 80 60 0 50 30 90 70 10 625567 g17 2.3 2.8 3.3 3.8 4.3 4.8 v cm = 0.4v 25c ?40c 125c time (s) 0 625567 g18 2 4 6 8 10 noise voltage (v) 5 ?1 4 2 0 ?3 3 1 ?4 ?2 ?5 v s = 2.5v v cm = 0v a v = 1 supply current vs supply voltage per channel supply voltage (v) 0 supply current (a) 100 40 20 80 60 0 625567 g12 1 2 3 4 5 25c ?40c 125c v cm = 0.4v
ltc6255/ltc6256/ltc6257 625567fb 9 t ypic a l p er f or ma nce c h a r a cteristics total harmonic distortion and noise total harmonic distortion and noise gain and phase vs frequency noise voltage density vs frequency wide band noise voltage density vs frequency input noise current vs frequency input referred noise voltage density (nv/ hz) 300 250 200 150 100 50 0 625567 g19 frequency (hz) 1 10 10k 100k 1k100 v s = 2.5v v cm = 0v input referred noise voltage density (nv/ hz) 80 70 60 40 30 20 10 50 0 625567 g20 frequency (hz) 0 2m 6m 4m v s = 2.5v v cm = 0v input referred noise current (pa/ hz) 25 20 15 10 5 0 625567 g21 frequency (hz) 1 10 1k 10k 100 v s = 2.5v v cm = 0v v outp-p (v) thd+n (%) 625567 g22 1 0.1 0.01 0.001 0.01 1 10 0.1 v s = 0.9v v cm = 0v a v = 2 r g = r f = 10k 1khz 500hz v outp-p (v) thd+n (%) 625567 g23 1 0.1 0.01 0.001 0.01 1 0.1 v s = 2.5v v cm = 0v a v = 2 r f = r g = 10k 1khz 500hz frequency (hz) amplitude (db) 625567 g24 10k 1m 10m 100k phase magnitude 80 40 20 60 ?20 50 30 70 10 0 ?10 phase ?60 ?100 ?120 ?80 ?160 ?90 ?110 ?70 ?130 ?140 ?150 v s = 2.5v v cm = 0v
ltc6255/ltc6256/ltc6257 10 625567fb capacitive load handling overshoot vs capacitive load large-signal response large-signal response time (ms) 0 voltage (v) 2.5 ?0.5 2.0 1.0 0 ?1.5 1.5 0.5 ?2.0 ?10 ?2.5 60 625567 g29 100 80 4020 v s = 2.5v a v = 1 r load = 10k c load = 10pf c load = 100pf c load = 1nf c load = 10nf time (s) 0 voltage (v) 0.9 0.6 0 ?0.3 0.3 ?0.6 ?0.9 60 625567 g30 100 80 4020 v s = 0.9v a v = 1 r load = 10k c load = 10pf c load = 100pf c load = 1nf c load = 10nf c load (nf) overshoot (%) 625567 g28 0.01 0.1 10 100 1 16 8 4 12 0 10 6 14 2 v s = 2.5v v cm = 0v a v = 1 v in = 2v t ypic a l p er f or ma nce c h a r a cteristics slew rate vs supply voltage common mode rejection ratio vs frequency power supply rejection ratio vs frequency v s + , supply voltage (v) 1.5 slew rate (v/s) 2.5 1.5 0.5 0 2.0 1.0 625567 g25 2.5 3.5 4.5 5.5 rising falling v s ? = 0v v step = v s + ? 1v a v = 1 r f = r g = 10k cmmr (db) 150 100 50 0 625567 g26 frequency (hz) 1k 10k 1m 10m 100k v s = 2.5v v cm = 0v pssr (db) 150 100 50 0 625567 g27 frequency (hz) 0.001 0.01 0.1 1 10 1k 10k 100 v + , v s = 1.8v, 0v v + , v s = 5v, 0v v ? , v s = 1.8v, 0v v ? , v s = 5v, 0v
ltc6255/ltc6256/ltc6257 625567fb 11 t ypic a l p er f or ma nce c h a r a cteristics small-signal response small-signal response time (s) 0 voltage (v) 0.05 ?0.01 0.04 0.02 0 ?0.03 0.03 0.01 ?0.04 ?0.02 ?0.05 60 625567 g31 100 80 4020 v s = 0.9v a v = 1 r load = 10k c load = 10pf c load = 100pf c load = 1nf c load = 10nf supply current vs shdn pin voltage supply current vs shdn pin voltage large-signal response v shdn (v) 0 1.0 supply current (a) 80 20 70 50 30 60 40 10 0 1.6 0.4 625567 g35 2.01.8 0.2 1.4 0.6 1.2 0.8 125c ?40c 25c v s = 1.8v, 0v v cm = 0.4v v shdn (v) 0 1.0 supply current (a) 90 80 20 70 50 30 60 40 10 0 0.4 625567 g36 1.6 0.2 1.4 0.6 1.2 0.8 125c ?40c 25c v s = 5v, 0v v cm = 0.4v output impedance vs frequency time (s) 0 voltage (v) 2.5 ?0.5 2.0 1.0 0 ?1.5 1.5 0.5 ?2.0 ?1.0 ?2.5 60 625567 g32 100 80 4020 v s = 2.5v a v = 1 c load = 100nf time (s) 0 voltage (v) 0.05 ?0.01 0.04 0.02 0 ?0.03 0.03 0.01 ?0.04 ?0.02 ?0.05 600 625567 g33 1000 800 400 200 v s = 2.5v a v = 1 c load = 100nf output impedance () 1000 100 10 1 0.1 0.01 625567 g34 frequency (hz) 0.01 0.1 100 10k1k 101 a v = 10 a v = 1 v s = 2.5v v cm = 0v
ltc6255/ltc6256/ltc6257 12 625567fb p in functions Cin: inverting input of the amplifier. voltage range of this pin can go from v C C 0.1v to v + + 0.1v. +in: non-inverting input of amplifier. this pin has the same voltage range as Cin. v + : positive power supply. typically the voltage is from 1.8v to 5.25v. split supplies are possible as long as the voltage between v + and v C is between 1.8v and 5.25v. a bypass capacitor of 0.1f as close to the part as possible should be used between power supply pins or between supply pins and ground. v C : negative power supply. it is normally tied to ground. it can also be tied to a voltage other than ground as long as the voltage between v + and v C is from 1.8v to 5.25v. if it is not connected to ground, bypass it with a capacitor of 0.1f as close to the part as possible. shdn: active low shutdown. shutdown threshold is 0.6v above negative rail. if left unconnected, the amplifier will be on. out: amplifier output. the voltage range extends to within millivolts of each supply rail. s i m pli f ie d s che ma tic figure 1. ltc6255/ltc6256/ltc6257 simplified schematic + i 2 q17 q18 esdd4 ?in +in v ? q3q4 q6 q8 r2 r4 q9 q12 r1 r3 r6 5m q7 q16 esdd3 v + esdd1 v + esdd2 v ? v ? v + shdn v ? d8 d7 esdd5 esdd6 d6 d5 q2 q5 v bias q1 + i 1 i 3 q19 r5 q11 q10 q13 q15 out c2 c1 + q14 c c buffer and output bias 625567 f01 logic
ltc6255/ltc6256/ltc6257 625567fb 13 o per a tion applic a tions i n f or ma tion the ltc6255 family input signal range extends beyond the negative and positive power supplies. the output can even extend all the way to the negative supply with the proper external pull-down current source. figure 1 depicts a simplified schematic of the amplifier. the input stage is comprised of two differential amplifiers, a pnp stage q1/q2 and npn stage q3/q4 that are active over different ranges of common mode input voltage. the pnp stage is active between the negative power supply to approxi- mately 1v below the positive supply. as the input voltage approaches the positive supply, transistor q5 will steer the tail current i 1 to the current mirror q6/q7, activating the npn differential pair and the pnp pair becomes inactive for the remaining input common mode range. also for the input stage, devices q17, q18 and q19 act to cancel the bias current of the pnp input pair. when q1/q2 is active, the current in q16 is controlled to be the same as the current q1/q2. thus, the base current of q16 is normally equal to the base current of the input devices of q1/q2. similar circuitry (not shown) is used to cancel the base current of q3/q4. the buffer and output bias stage uses a special compensation technique to take full advantage of the process technology to drive high capacitive loads. the common emitter topology of q14/q15 enables the output to swing from rail to rail. low supply voltage and low power consumption the ltc6255 family of operational amplifiers can operate with power supply voltages from 1.8v to 5.25v. each am - plifier draws only 65a. the low supply voltage capability and low supply current are ideal for portable applications. high capacitive load driving capability and wide bandwidth the ltc6255 family is optimized for wide bandwidth low power applications. they have an extremely high gain-bandwidth to power ratio and are unity gain stable. when the load capacitance increases, the increased ca - pacitance at the output pushed the non-dominant pole to lower frequency in the open loop frequency response, worsening the phase and gain margin. they are designed to directly drive up to 100nf capacitive load in unity gain configuration (see typical performance characteristics, capacitive load handling). higher gain configurations tend to have better capacitive drive capability than lower gain configurations due to lower closed loop bandwidth and hence higher phase margin. low input referred noise the ltc6255 family provides a low input referred noise of 20nv/ hz at 1khz. the noise density will grow slowly with the frequency in wideband range. the average noise voltage density over 3mhz range is less than 24nv/ hz. the ltc6255 family is ideal for low noise and low power signal processing applications. low input offset voltage the ltc6255 family has a low offset voltage of 350v maximum which is essential for precision applications. the offset voltage is trimmed with a proprietary trim algorithm to ensure low offset voltage over the entire common mode voltage range. low input bias current the ltc6255 family uses a bias current cancellation circuit to compensate for the base current of the input transistors. when the input common mode voltage is within 200mv of either rail, the bias cancellation circuit are no longer ac - tive. for common mode voltages ranging from 0.2v above
ltc6255/ltc6256/ltc6257 14 625567fb the negative supply to 0.2v below the positive supply, the low input bias current allows the amplifiers to be used in applications with high resistance sources. ground sensing and rail to rail output the ltc6255 family has excellent output drive capability, delivering over 10ma of output drive current. the output stage is a rail-to-rail topology that is capable of swinging to within 30mv of either rail. if output swing to the negative rail is required, an external pull down resistor to a negative supply can be added. for 5v/0v op amp supplies, a pull down resistor of 2.1k to C2v will allow a true zero output swing. in this case, the output can swing all the way to the bottom rail while maintaining 80db of open loop gain. since the inputs can go 100mv beyond either rail, the op amp can easily perform true ground sensing. the maximum output current is a function of total supply voltage. as the supply voltage to the amplifier increases, the output current capability also increases. attention must be paid to keep the junction temperature of the ic below 150c when the output is in continuous short-circuit. the output of the amplifier has reverse-biased diodes con - nected to each supply. the output should not be forced more than 0.5v beyond either supply, otherwise current will flow through these diodes. input protection and output overdrive to prevent breakdown of the input transistors, the input stages are protected against a large differential input voltage by two pairs of back-to-back diodes, d5 to d8. if the differential input voltage exceeds 1.4v, the current in these diodes must be limited to less than 10ma. these amplifiers are not intended for open loop applications such as comparators. when the output stage is overdriven, internal limiting circuitry is activated to improve overdrive recovery. in some applications, this circuitry may draw as much as 1ma supply current. esd the ltc6255 family has reverse-biased esd protection diodes on all inputs and output as shown in figure 1. supply voltage ramping fast ramping of the supply voltage can cause a current glitch in the internal esd protection circuits. depending on the supply inductance, this could result in a supply volt- age transient that exceeds the maximum rating. a supply voltage ramp time of greater than 1ms is recommended. feedback components care must be taken to ensure that the pole formed by the feedback resistors and the parasitic capacitance at the inverting input does not degrade stability. for example, in a gain of +2 configuration with gain and feedback resis- tors of 10k, a poorly designed circuit board layout with parasitic capacitance of 5pf (part +pc board) at the ampli- fiers inverting input will cause the amplifier to oscillate due to a pole formed at 3.2mhz. an additional capacitor of 5pf across the feedback resistor as shown in figure 2 will eliminate any ringing or oscillation. shutdown the single and dual versions have shdn pins that can shut down the amplifier to less than 7a supply current. the shdn pin voltage needs to be within 0.6v of v C for the amplifier to shut down. during shutdown, the output will be in high output resistance state, which is suitable for multiplexer applications. when left floating, the shdn pin is internally pulled up to the positive supply and the amplifier remains enabled. 10k 10k 5pf c par v out v in 625567 f02 + ? ltc6255 figure 2. applic a tions i n f or ma tion
ltc6255/ltc6256/ltc6257 625567fb 15 50 ?10 40 20 0 ?30 30 10 ?40 ?20 ?50 gain (db) 625567 f03b frequency (hz) 10 100 100k 10m1m 10k1k t ypic a l applic a tions 90.9k 90.9k v in 625567 f03a v out 0.9v ?0.9v ? + ? + 10k 10k 1/2 ltc6256 1/2 ltc6256 frequency response of 40db gain amplifier ltc6255 very low power 2nd order lowpass filter the ltc6256 circuit shown in figure 4 is a 2nd order, 100khz, butterworth lowpass filter. the filters differential output maximizes the dynamic range in very low voltage operation. a general 2nd order lowpass circuit is shown in figure 3. gain of 100 amplifier (3db bandwidth of 200khz on 130a supply current) figure 5 with the equations to calculate the rc components for cutoff frequencies up to 100khz for a butter worth or a bessel approximation (a bessel lowpass filter has very low transient response overshoot). in addition the equations for a 4th order lowpass filter are provided to calculate the rc components for two cascaded 2nd order sections. 200khz 130a gain-of-100 amplifier a, 1.8v, 140a, 100khz, lowpass filter (single-ended input and differential output) frequency response frequency (hz) gain (db) 625567 f04b 10k 100k 1m 6 ?18 ?30 ?6 ?42 ?12 ?24 0 ?36 ? + ? + 7 v out + 625567 f04a v out ? 2.49k 1/2 ltc6256 1/2 ltc6256 2 1 100pf 3 5 6 8 v in 1000pf 10k 1.8v 1.8v 2.49k 2.49k 2.49k 0.1f 4 10f 100k 100k figure 4
ltc6255/ltc6256/ltc6257 16 625567fb figure 5 ? + v out 625567 f05 ltc6255 4 1 c2 3 6 v in c1 r3 v + v + r1 r2 0.1f shdn 2 5 100k 100k 10f t ypic a l applic a tions rc component equations r2 = 1 ? 1 ? 4 q 2 gain + 1 [ ] c2 c1 ? ? ? ? ? ? 4 q f o c2 r3 = 1 4 2 r2 c1 c2 f o 2 gain = r2 r1 r1 = r2 gain c1 > 4 q 2 gain + 1 ( ) c2 maximum f C3db = 100khz and maximum gain = 100khz f C3db table 1. f o and q values 2nd order lowpass butterworth f o = f C3db q = 0.707 bessel f o = 1.274 ? f C3db q = 0.577 4th order lowpass butterworth f o = f C3db f o = f C3db q = 0.541 q = 1.307 bessel f o = 1.419 ? f C3db f o = 1.591 ? f C3db q = 0.522 q = 0.806 2s rise time analog 1a pulsed led current driver figure 6 shows the ltc6255 applied as a fast, efficient analog led current driver. high power leds are used in applications ranging from brake lights to video projectors. most led applications pulse the leds for the best efficiency, and many applications take advantage of control of both pulse width and analog current amplitude. in order to extend the circuits input range to accommodate 5v output dacs, the input voltage is initially divided by 50 through the r1:r2 divider. the reduced step is applied to the ltc6255 non inverting input, and ltc6255 output rises until mosfets q1 through q3 begin to turn on, increasing the current in their drains and therefore the led. the amount of current is sensed on r3, and fed back to the ltc6255 inverting input through r5. the loop is compensated by r5 and c1, with r4 distancing the gate capacitance from the op amp output for the best time domain response. 10% to 90% rise time was measured at 2s on a 10ma to 1a pulse. starting at 0 current there is an additional delay of 2.7s. it may seem strange to use a micropower op amp in a high current led application, but it can be justified by the low duty cycles encountered in led drive applications. a one amp led is quite bright even when driven at 1% or even 0.1% duty cycles and these constitute 10ma and 1ma average current levels respectively, in which case the supply current of the op amp becomes noticeable. the ltc6255 combines 6.5mhz of gain-bandwidth product and 1.8v/s slew rate on a supply current budget of only 65a.
ltc6255/ltc6256/ltc6257 625567fb 17 t ypic a l applic a tions when v in is at 0v, the op amp supply current is nominally 65a, but the 450v maximum input offset may appear across r3 inducing a 4.5ma current in the led. some ap- plications want a guaranteed zero led current at v in = 0, and this is the purpose of r up . r up forces 5a reverse current through r5 creating a negative 1.2mv output offset at r3. this guarantees a zero led current, but note that the op amp supply current rises from 65a to a still respectable 650a in this case due to internal protection circuitry for the output stage. for reduced current, the ltc6255 can be shut down, but the output becomes high impedance and may leak high which will turn on the mosfets and led hard. adding pull-down resistor r sd ensures that the ltc6255 output goes low when shutting down. figure 6. ltc6255 applied as a led current driver with 2s rise time figure 7. time domain response showing 2s rise time. top waveform is v in . middle waveform is the 10ma to 1a step measured at r3, then the 0ma to 1a step showing extra 2.7s delay when recovering from 0ma 2s rise time analog 1a pulsed led current driver pa ck a ge description kc package 8-lead plastic utdfn (2mm 2mm) (reference ltc dwg # 05-08-1749 rev ?) 2.00 0.10 2.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 0.64 0.10 0.55 0.05 r = 0.115 typ r = 0.05 typ 1.35 ref 1.37 0.10 1 4 8 5 pin 1 bar top mark (see note 6) 0.125 ref 0.00 ? 0.05 (kc8) utdfn 0107 rev? 0.23 0.05 0.45 bsc 0.25 0.05 1.35 ref recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.64 0.05 1.37 0.05 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.45 bsc pin 1 notch r = 0.20 or 0.25 45 chamfer + ? i led = v in ? 200ma/v i led 625567 f06 ltc6255 c1 220pf q1 q1 to q3 mosfets 3 2n7000 led osram lrw5sm * r sd guarantees led off when op amp shdn . otherwise optional. ** r up forces led completely off when v in = 0. otherwise optional. standby supply current with v in = 0: 65a r up open 650a r up installed 10% to 90% rise time: 10ma to 1a, 2s 0ma to 1a, add 2.7s delay q2 q3 v in 5v 5v 5v r1 9.76k r4 51 r2 200 shdn r up 1m** r5 240 r sd 100k* r3 0.1 100mw 625567 f07 10ma to 1a 0ma to 1a (extra delay) v in please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc6255/ltc6256/ltc6257 18 625567fb pa ck a ge description 1.50 ? 1.75 (note 4) 2.80 bsc 0.30 ? 0.45 6 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) s6 tsot-23 0302 rev b 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc6255/ltc6256/ltc6257 625567fb 19 pa ck a ge description 1.50 ? 1.75 (note 4) 2.80 bsc 0.22 ? 0.36 8 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) ts8 tsot-23 0710 rev a 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.40 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637 rev a) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc6255/ltc6256/ltc6257 20 625567fb pa ck a ge description ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f) msop (ms8) 0307 rev f 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.1016 0.0508 (.004 .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc6255/ltc6256/ltc6257 625567fb 21 pa ck a ge description ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661 rev e) msop (ms) 0307 rev e 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1 2 3 4 5 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8910 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 0.1016 0.0508 (.004 .002) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc6255/ltc6256/ltc6257 22 625567fb ms package 16-lead plastic msop (reference ltc dwg # 05-08-1669 rev ?) msop (ms16) 1107 rev ? 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16151413121110 1 2 3 4 5 6 7 8 9 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 4.039 0.102 (.159 .004) (note 3) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) pa ck a ge description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc6255/ltc6256/ltc6257 625567fb 23 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r e v ision h istory rev date description page number a 9/10 revised a v conditions in 5v electrical characteristics and 1.8v electrical characteristics sections revised i s max values in 5v electrical characteristics section revised i sc min values in 1.8v electrical characteristics section 4, 5 4 6 b 9/11 updated the features and description sections. added c-, h-, and i-grades to the absolute maximum ratings and order information sections. updated 5v and 1.8v electrical characteristics sections. revised the title of curve g32 in the typical performance characteristics section. revised figure 6 in the typical applications section. revised the typical application drawing on the back page. 1 2, 3 3 to 6 8 17 24
ltc6255/ltc6256/ltc6257 24 625567fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2010 lt 0911 rev b ? printed in usa t ypic a l applic a tion r el a te d pa rts part number description comments ltc6246/ltc6247/ ltc6248 180mhz, 1a, power efficient rail-to-rail op amps 180mhz gbw, 1ma, 500v v os , rr in/out, 2.5v to 5.25v, 90v/s slew rate lt1498/lt1499 10mhz, 6v/s, dual/quad,rail-to-rail input and output, precision c-load op amps 10mhz gbw, 1.7ma, 475v v os , rr in/out, 2.2v to 15v, 10nf c load ltc6081/lt6082 precision dual/quad cmos rail-to-rail input/output amplifiers 3.6mhz gbw, 330a, 70v v os , rr in/out, 2.7v to 5.5v, 100db cmrr ltc2050/ltc2051/ ltc2052 zero-drift operational amplifiers in sot-23 3mhz gbw, 800a, 3v v os , v C to v + C 1v in, rr out, 2.7v to 6v, 130db cmrr/psrr ltc1050/ltc1051/ ltc1052 precision zero-drift, operational amplifierwith internal capacitors 2.5mhz gbw, 1ma, 5v v os , v C to v + C 2.3v in, rr out, 4.75v to 16v, 120db cmrr, 125db psrr ltc6084/ltc6085 dual/quad 1.5mhz, rail-to-rail, cmos amplifiers 1.5mhz gbw, 110a, 750v v os , rr in/out, 2.5v to 5.5v lt1783 1.25mhz, over-the-top ? micropower, rail-to-rail input and output op amp in sot-23 1.25mhz gbw, 300a, 800v v os , rr in/out, 2.5v to 18v lt1637/lt1638/ lt1639 1.1mhz, 0.4v/s over-the-top micropower, rail-to-rail input and output op amps 1.1mhz gbw, 250a, 350v v os , rr in/out, 2.7v to 44v, 110db cmrr lt2054/lt2055 single/dual micropower zero-drift operational amplifiers 500khz gbw, 150a, 3v v os , v C to v + C 0.5v in, rr out, 2.7v to 6v lt6010/lt6011/ lt6012 135a, 14nv/ hz, rail-to-rail output precision op amp with shutdown 330khz gbw, 135a, 35v v os , v C + 1.0v to v + C 1.2v in, rr out, 2.7v to 36v lt1782 micropower, over-the-top, sot-23, rail-to-rail input and output op amp 200khz gbw, 55a, 800v v os , rr in/out, 2.5v to 18v lt1636 over-the-top, micropower rail-to-rail, input and output op amp 200khz gbw, 50a, 225v v os , rr in/out, 2.7v to 44v, C40c to 125c lt1490a/lt1491a dual/quad over-the-top, micropower rail-to-rail input and output op amps 200khz gbw, 50a, 500v v os , rr in/out, 2v to 44v lt2178/lt2179 17a max, dual and quad, single supply, precision op amps 85khz gbw, 17a, 70v v os , rr in/out, 5v to 44v lt6000/lt6001/ lt6002 single, dual and quad, 1.8v, 13a precision rail-to-rail op amps 50khz gbw, 16a , 600v v os(max) , rr in/out, 1.8v to 18v time domain response showing 2s rise time. top waveform is v in . middle waveform is the 10ma to 1a step measured at r3, then the 0ma to 1a step showing extra 2.7s delay when recovering from 0ma 2s rise time analog 1a pulsed led current driver. ltc6255 applied as a led current driver with 2s rise time + ? i led = v in ? 200ma/v i led 625567 ta02a ltc6255 c1 220pf q1 q1 to q3 mosfets 3 2n7000 led osram lrw5sm q2 q3 v in 5v 5v 5v r1 9.76k r4 51 r2 200 shdn r up 1m** r5 240 r sd 100k* r3 0.1 100mw * r sd guarantees led off when op amp shdn . otherwise optional. ** r up forces led completely off when v in = 0. otherwise optional. standby supply current with v in = 0: 65a r up open 650a r up installed 10% to 90% rise time: 10ma to 1a, 2s 0ma to 1a, add 2.7s delay 625567 ta02b 10ma to 1a 0ma to 1a (extra delay) v in

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